Unlock Higher Performance with Intel DDI Technology

Updated on Jun 10,2024

Unlock Higher Performance with Intel DDI Technology

Table of Contents

  1. Introduction
  2. Trends in Network Virtualization
  3. Requirements for Intel Data Direct IO Technology
  4. How Intel DDI Works
  5. Advantages of Intel DDI
  6. Performance Issues in NFV Workloads
    • Keeping Up with High Bandwidth Demand
    • Increasing Link Speeds
    • Optimizing Packet Processing
    • Providing Service Time Guarantees
    • Ensuring Performance Isolation
  7. Network IO and Packet Processing Overview
  8. Overheads in Network Packet Processing
  9. Software-Based Optimization Solutions
    • Kernel Bypass Techniques
    • New API for Reduced Interrupt Load
    • RX Side Scaling
  10. The Role of Memory Access Speeds
  11. Core Resources and Contention
  12. Introduction to Intel Data Direct IO (DDI)
  13. DDI Characteristics and Default Configuration
  14. Tuning Opportunities for Improved Performance
    • Increasing the Number of LLC Ways Reserved for DDI
  15. Experimental Results and Performance Analysis
    • Latency and Throughput Improvements
    • Relationship between Packet Size and RS Descriptors
    • Relationship between Number of Cores and DDI Capacity
    • Performance Issues: Leaky DMA and Latency Contention
  16. Solutions and Optimization Techniques for Leaky DMA
    • Buffer Sizing
    • Proper Placement and Allocation
  17. Conclusion

Introduction

In today's presentation, we will delve into Intel Data Direct IO (DDI) technology. We will discuss why this technology is required in network virtualization and explore its advantages. Additionally, we will address the performance issues associated with network function virtualization (NFV) workloads and examine the need for optimizing packet processing and ensuring performance isolation.

Trends in Network Virtualization

With the rise of software-defined networking and network function virtualization, the network capabilities that were once provided by dedicated hardware have shifted to software-based functions running on general-purpose servers. This shift has been driven by the demand for high-bandwidth applications, such as video streaming and IoT, as well as the deployment of 5G technologies. However, this movement towards software-based network functions has presented challenges in terms of providing high throughput, low latency, and service time guarantees.

Requirements for Intel Data Direct IO Technology

To address the performance issues in NFV workloads, we need to optimize packet processing to achieve higher throughput and provide predictable performance similar to dedicated hardware. Additionally, performance isolation is crucial as multiple software applications run on shared general-purpose servers, which can lead to interference and degrade the performance of individual applications.

How Intel DDI Works

Intel DDI is a microarchitecture-level optimization technique introduced with the Intel Xeon Processor E5 or ASL CPU. It enables faster IO data transfers with fewer trips to memory. Traditionally, when a network packet arrives at the NIC, it is first DMA'd into the DRAM and then brought to the cache for processing by the CPU. However, with Intel DDI, the NIC can directly write the incoming packet into the last-level cache (LLC), eliminating the need for a trip to DRAM. This reduces latency and memory bandwidth utilization, resulting in improved performance.

Advantages of Intel DDI

The main advantage of Intel DDI is the reduction in latency and increased system IO bandwidth. By eliminating the memory round trip between DRAM and cache, the CPU can access data directly from the cache at a faster rate. Additionally, the reduction in memory bandwidth requirements allows for more efficient utilization of system resources. However, it is important to note that the benefits of Intel DDI depend on the characteristics of the applications running on the server.

Performance Issues in NFV Workloads

NFV workloads face several performance issues, including keeping up with the demand for high bandwidth, increasing link speeds, optimizing packet processing, providing service time guarantees, and ensuring performance isolation. These issues arise from the limited time available for processing packets, the need to handle multiple network IO applications on shared servers, and the interference caused by co-located applications.

Network IO and Packet Processing Overview

When an application needs to transmit data, it uses system calls like open, close, read, and write to request the kernel to send the packet. The kernel processes the packet and adds the Relevant headers to the socket's buffers. Once processing is complete, the packet is picked up by the kernel and stored in the TX ring of the network driver. When the NIC is ready to transmit the packet, it picks it up from the TX ring and sends it over the physical media. The RX path works similarly, with the NIC DMA'ing the incoming packet into the RX ring, and the CPU processing and copying the payload into the application.

Overheads in Network Packet Processing

Several overheads are involved in network packet processing, such as mode switching from user to kernel, multiple packet copying, and interrupt processing. These overheads can impact the performance of software-based network transformations compared to dedicated hardware. To address these issues, software-based solutions like kernel bypass techniques and new APIs have been proposed and implemented to reduce latency and interrupt load.

Software-Based Optimization Solutions

Kernel bypass techniques, such as DPDK, bypass the kernel and implement packet processing in the user space. This reduces the mode switching overhead and eliminates the need for multiple packet copying. New APIs, like Receive Side Scaling (RSS), distribute incoming packets among multiple cores, reducing interrupt processing and improving parallelism.

The Role of Memory Access Speeds

Memory access speeds play a crucial role in network IO performance. By maintaining data structures like socket buffers and TX/RX rings in the cache, faster access to these structures is possible, leading to optimized packet processing and improved performance.

Core Resources and Contention

With multiple sockets and cores in a server, there is a need to manage core resources effectively to avoid contention and performance degradation. Traditional server setups with shared resources like the last-level cache and integrated memory controller can lead to contention among cores running different applications. This contention affects the performance of IO-intensive applications and calls for proper resource management.

Introduction to Intel Data Direct IO (DDI)

Intel DDI is a technology introduced with the Intel Xeon Processor E5 or ASL CPU to enable faster IO data transfers. By making the cache the primary destination of data rather than main memory, DDI reduces latency and memory bandwidth utilization. It works by directly writing incoming packets into the LLC, allowing the CPU to process data directly from the cache.

DDI Characteristics and Default Configuration

By default, only two LLC ways are reserved for DDI, out of the available LLC ways on a server. These reserved ways are specific to DDI and cannot be partitioned using cache allocation technology (CAT). This default configuration provides a limited space for DDI, and exceeding this limit can result in performance degradation.

Tuning Opportunities for Improved Performance

To maximize the benefits of DDI and improve performance, there are tuning opportunities available. These include increasing the number of LLC ways reserved for DDI and other performance optimizations. By increasing the number of LLC ways, more space can be allocated to DDI, allowing for better performance with higher network IO demands.

Experimental Results and Performance Analysis

Through experiments and performance analysis, the benefits of Intel DDI can be observed. These experiments measure parameters like latency, throughput, and hit rate for different configurations, such as the number of RS descriptors and the relationship between packet size and hit rate. The results show the impact of DDI on system performance and the need for proper tuning to address performance issues like leaky DMA and latency contention.

Solutions and Optimization Techniques for Leaky DMA

To mitigate the leaky DMA problem, buffer sizing and proper placement of data can be implemented. Buffer sizing involves limiting the number of RS descriptors to fit within the available space. Proper placement ensures that io-intensive applications do not interfere with each other or with CPU-intensive applications, preventing unnecessary evictions and memory round trips.

Conclusion

Intel DDI technology offers several advantages for optimizing network IO performance. By reducing latency, improving memory access speeds, and providing efficient utilization of resources, DDI enables faster IO data transfers and improved packet processing for network-intensive applications. However, proper tuning and optimization techniques are essential to fully leverage the benefits of DDI and address performance issues in NFV workloads.

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