An AI-powered assistant designed for semiconductor engineers to automate device physics calculations, reference fabrication processes, support IC design verification, and diagnose chip yield issues.
Install & Download
1. ClawHub CLI
The fastest way to install a skill directly from the registry.
npx clawhub@latest install semiconductor-engineer
2. Manual Installation
Copy the skill folder to one of these locations
~/.openclaw/skills/ <project>/skills/ Priority: Workspace > Local > Bundled
3. Prompt Installation
Copy this prompt to OpenClaw to install it automatically.
Help me install semiconductor-engineer using Clawhub. If Clawhub is not installed, install it first (npm i -g clawhub).
Prefer to download?
Get the raw skill files in a ZIP archive.
What is Semiconductor Engineer?
The Semiconductor Engineer skill is an all-in-one assistant designed to optimize workflows across device physics, chip design, process engineering, and yield diagnostics. Built to support engineers in real-time, this skill automates complex mathematical calculations like carrier concentrations and MOSFET threshold voltages based on classic textbooks like Sze and Streetman. By integrating these analytical models directly into an AI coding agent, it empowers hardware developers and fab specialists to bridge the gap between simulation and execution.
Leveraging a rich database of semiconductor materials, manufacturing nodes (from 180nm down to 3nm), and failure modes, the agent offers structured answers to technical queries, writes clean SPICE decks, and debugs physical design violations (DRC/LVS). It acts as an invaluable asset among Openclaw Skills, helping engineers run automated calculations via Python scripts and even generate interactive HTML visualization reports containing process radar charts and failure analysis trees.
Semiconductor Engineer Use Cases
- Device Physics Computations: Quickly calculating intrinsic carrier concentration, doping-to-resistivity, and depletion layer width without manual formula derivation.
- Process Node Benchmarking: Fast retrieval of lithography, etching, thin-film deposition, and CMP parameters for legacy and advanced CMOS nodes (e.g., 28nm to 3nm).
- IC Design & SPICE Simulation: Writing RTL code blocks (Verilog/VHDL), designing finite state machines, managing clock domain crossings (CDC), and generating functional SPICE simulation decks.
- Yield & Failure Diagnostics: Modeling chip yield using Negative Binomial or Murphy models and troubleshooting failure mechanisms like TDDB, HCI, Latch-up, and ESD.
- EDA Tool Operations Troubleshooting: Seeking fast reference guides and step-by-step terminal commands for industry-standard Cadence, Synopsys, Siemens, and Ansys toolchains.
How Semiconductor Engineer Works
- Request Intake & Routing: The agent intercepts the user's natural language request (e.g., 'calculate PMOS Vth at 7nm') and routes it to the correct submodule.
- Execution of Calculators: For mathematical problems, the agent invokes 'scripts/semiconductor_calc.py' to process variables and return exact physical properties.
- Reference Lookup: For fabrication processes, material characteristics, or failure modes, the agent retrieves data from embedded Markdown references like 'materials_data.md' and 'process_technology.md'.
- HDL & SPICE Generation: When requested to assist in design, the agent crafts functional HDL code, verification strategies, or SPICE netlists incorporating correct device parameters.
- Interactive HTML Reporting: For comprehensive assessments, the agent combines calculation scripts and process data into a standalone, browser-viewable HTML/CSS dashboard powered by Chart.js.
Semiconductor Engineer Setup
This skill runs on top of your AI agent workspace. Ensure you have Python installed with basic science packages.
Prerequisites
Install required dependencies:
pip install numpy scipy matplotlib
Running Calculations via CLI
You can directly invoke the underlying calculator script from your terminal:
# Calculate n-type Silicon resistivity with a doping concentration of 1e17 cm^-3
python scripts/semiconductor_calc.py resistivity --type n --concentration 1e17
Integration into AI Coding Agent
To utilize this inside your AI environment, import this workspace skill. The agent automatically detects the tools under Openclaw Skills and routes your prompts appropriately.
Semiconductor Engineer Data Schema & Taxonomy
The Semiconductor Engineer skill organizes its logic, data, and metadata across a clean, standard directory taxonomy:
| Directory / File | Description | Key Schema / Parameters Covered |
|---|---|---|
scripts/semiconductor_calc.py |
Core calculation engine supporting CLI and Python imports. | carrier conc., resistivity, V_th, depletion width, breakdown voltage, yield models |
references/semiconductor_physics.md |
Bandgap theory, PN junctions, and short-channel effects. | Carrier statistics, drift/diffusion formulas, MOSFET band diagrams |
references/process_technology.md |
CMOS manufacturing specs from 180nm to 3nm. | Lithography NA, RIE etching, CVD/ALD thin film, CMP, metallization |
references/materials_data.md |
Solid-state material constants. | Si, Ge, GaAs, GaN, SiC, InP, Ga2O3, Diamond (bandgap, mobility, thermal conductivity) |
references/failure_analysis.md |
Diagnosis flows & semiconductor reliability models. | EMMI/OBIRCH location, SEM/TEM analysis, GOI, TDDB, HCI, Latch-up, ESD |
Generated Report Structure
When generating comprehensive assessments, the agent outputs a single-file HTML dashboard with:
- KPI Cards: Parameters quick-glance panel.
- Process Radar Chart: Comparing Performance, Power, Area, Yield, and Cost.
- Spider Web Chart: Multi-material properties comparison (e.g., GaN vs SiC).
- Failure Tree Diagram: Interactive root-cause diagnostic.
Semiconductor Engineer Advanced Features
- Interactive Visualization Reports: Automated export of standard and wide-bandgap device parameters into modern, responsive single-file HTML reports integrated with Chart.js.
- Yield Model Selection: Toggle between Poisson, Murphy, Seeds, and Negative Binomial yield models to fit specific foundry statistics.
- Multi-Generation Node Benchmarking: Direct comparative queries tracking scaling transitions from 180nm planar to 3nm GAA architecture.
- Automated SPICE Deck Constructor: Generates ready-to-simulate SPICE decks featuring pre-calculated transient and DC analysis directives.
- Comprehensive FA Flowcharting: Interactive diagnostics that build step-by-step failure tree analysis maps dynamically inside the agent context.
SKILL.md
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